Microsoft Patents
See Microsoft's patents in other areas
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Hardware Accelerators
Microsoft filed these patents around Hardware Accelerators in the last 5 years
| # | Patent No. | Short Description |
|---|---|---|
| 1. | US10911031B2 | Superconducting circuits that can process input signals with variable data rates without requiring a DC offset |
| 2. | US11340985B2 | A data processing unit (DPU) with specialized hardware accelerators to efficiently process data streams like network packets or storage packets |
| 3. | US11405179B2 | High-throughput data processing unit for efficiently processing streams of information like network packets or storage packets |
| 4. | US10999084B2 | Leveraging remote direct memory access (RDMA) to enable full packet capture at line rate without CPU bottleneck |
| 5. | US11309908B2 | Hardware-based data compression accelerator for network and storage devices that enables efficient compression of data payloads |
| 6. | US20230196085A1 | Training neural networks using quantized floating-point formats to improve performance on low-power hardware like FPGAs |
| 7. | US20190286973A1 | Accelerating neural network processing by partitioning models into subgraphs that can be executed on specialized hardware accelerators |
| 8. | US11593138B2 | A server design that offloads hypervisor functions from the CPU complex to a dedicated offload card with a SoC and FPGA |
| 9. | US10645187B2 | A specialized data processing unit for network and storage devices that offloads tasks from general purpose processors to improve performance and efficiency |
| 10. | US10827191B2 | A data processing unit (DPU) with specialized hardware accelerators to improve network and storage performance |
| 11. | US10691413B2 | Using reduced bit-width block floating point vectors to improve the accuracy of neural networks while reducing computational requirements |
| 12. | US11256644B2 | A data processing unit (DPU) that can dynamically reconfigure its PCIe interface between root complex (RC) and endpoint (EP) modes without requiring a reboot |
| 13. | US10990478B2 | Efficiently processing a series of work units in a multiple core processor system by using specialized hardware accelerators |
| 14. | US10785020B2 | Hardware offloading for QUIC transport protocol to improve performance |
| 15. | US11042501B2 | Reducing latency of replicated transactions in distributed storage systems by offloading work from CPUs to network interface cards (NICs) |
Download the full patent report containing all of the 236 patents | ||
