Low Power Low Noise Electronics at Qubit Temperature

A processor assembly for a quantum computer that alleviates thermal management challenges in cryogenic environments. The assembly features a temperature gradient within the processor, with electrical connectors thermally anchored to a higher temperature stage than the quantum processor die. This design enables efficient thermal management while maintaining electrical connectivity, allowing for reliable operation of quantum computing systems at millikelvin temperatures.

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Superconducting device for controlling coupling strength between qubits in quantum computers. The device has a hotspot nanowire sandwiched between two adjacent qubits. The hotspot nanowire can be biased with a current below a critical value to keep it superconducting, allowing strong qubit coupling. But if the bias exceeds the critical value, the nanowire enters a high-resistance state, decoupling the qubits. This allows independent tuning of the coupling strength between qubits without affecting the resonator quality factor. The nanowire can be embedded in an etched hole in the substrate to isolate it. Gold layers on the nanowire sides prevent harmful effects. A bias current line underneath isolates the nanowire.

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Tuning physical characteristics of quantum devices like qubits to improve quantum computing performance. The technique involves using a voltage gain tuner with inductive coupling to the device's inductance, positioned on a current path connected to the device. Applying a flux bias to the tuner varies the voltage ratio between nodes separated by a capacitor. This effectively tunes the device's capacitance. By introducing the flux bias and controlling it based on measured capacitance differences, the device capacitance can be brought closer to target values. This allows dynamic in-situ tuning of qubit, coupler, and other capacitances during quantum computing processes.

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Thermalizing and attenuating control signals in quantum computing systems to mitigate signal noise and power levels inside cryogenic chambers. The technique involves splitting the control signals outside the cryogenic chamber using a directional coupler. One split signal goes to the quantum devices inside the chamber while the other return signal is transmitted back to the higher temperature environment. This allows thermalizing and attenuating the control signals before they enter the colder cryogenic environment.

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A cryogenic control system for quantum devices that uses a superconducting rigid-flex circuit to thermally isolate control electronics from qubit chips while enabling electrical connectivity. The system comprises a qubit plane with qubit chips connected to a first rigid circuit portion of the superconducting rigid-flex circuit, which is cooled to below 100 mK. A control system with control chips connected to a second rigid circuit portion of the superconducting rigid-flex circuit operates at a higher temperature (below 10 K), allowing for heat dissipation while maintaining thermal isolation from the qubit plane.

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Operating a set of qubits at cryogenic temperatures through a novel interconnect architecture that enables efficient cooling while maintaining quantum coherence. The system employs a substrate with integrated connectors that connect the cryogenic qubits to a separate substrate containing the control electronics. This configuration enables the cryogenic qubits to be cooled using a single cooling element, while the control electronics maintain optimal temperature conditions. The connectors are designed to minimize heat transfer between the cryogenic and control substrates, allowing the cryogenic qubits to be cooled below 2K while the control electronics operate at room temperature.

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A method for modifying the normal state resistance of a Josephson junction in a superconducting qubit by thermally annealing the junction using a heated element in proximity to the junction. The heated element is brought into contact or proximity with the junction, and the thermal energy transferred to the junction increases its normal state resistance. The method enables precise control over qubit frequencies, particularly in large-scale quantum computing architectures where frequency crowding is a significant challenge.

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Tuning the physical characteristics of quantum devices like qubits and couplers in a quantum processor to improve performance. The tuning is done by using voltage gain tuners that are inductively coupled to the device's current path and positioned between nodes separated by a capacitor. Applying a flux bias to these tuners varies the voltage ratio between the nodes and thereby changes the effective capacitance of the device. This allows dynamic capacitance tuning during quantum operations to optimize qubit performance, for example by compensating for persistence current effects in annealing qubits.

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Magnetic flux control system for superconducting quantum computing that enables precise and dynamic control of superconducting circuit parameters. The system generates controlled single-flux-quantum pulses, converts them into magnetic flux, and integrates the flux to define an integrated magnetic flux. This integrated flux is then used to control quantum computing circuit parameters, such as microwave resonance frequencies, through precise manipulation of the superconducting circuit's magnetic field. The system enables rapid, programmable control of the superconducting circuit's parameters, particularly for large-scale quantum computing applications where precise control of qubit energies and couplings is critical.

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A superconducting memory circuit that increases memory density while maintaining reliability and performance. The circuit includes segmented write-word lines with local write select circuits, reducing flux quanta required for write operations. The segmented architecture enables higher integration density and improved write select margins. The circuit also employs a power-signal propagation circuit to efficiently distribute superconducting signals across the memory array.

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A scalable quantum computing system that enables low-error quantum computing at scale by controlling fluxonium qubits using baseband magnetic flux pulses. The system comprises an array of coupled fluxonium qubits, each comprising a Josephson junction shunted by a capacitor and inductor, and a control module that applies magnetic flux pulses to the qubits based on digital control signals. The pulses induce entangling interactions between qubits, enabling two-qubit gates with high fidelity, and can be dynamically controlled to achieve desired quantum operations.

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Compensating unwanted variations in superconducting quantum processors caused by fabrication imperfections. The compensation involves actively adjusting parameters like inductance and capacitance to match between qubits and components. This is done using tunable couplers, tunable LC circuits, and controllable Josephson junctions. By selectively tuning these elements, discrepancies in characteristics like critical currents and capacitances can be balanced between qubits and couplers. This allows compensating for variations in fabrication that affect qubit behavior.

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A device for detecting RF-range photons, comprising a detection element cooled to a superconducting state, a cooling device, and a micro-ohmmeter. The detection element, composed of a Dirac semimetal such as cadmium arsenide, exhibits a surface state that can absorb RF-range photons. The cooling device cools the detection element to a temperature below 0.45 K, enabling detection of multiple incident photons through measurement of changes in the detection element's electrical resistance.

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Automatic real-time calibration of qubit chips in quantum computers to maintain fidelity of quantum gates during execution of algorithms. The calibration involves using sensors on some qubits to measure environmental effects, which are then fed into a machine learning engine to generate updated control parameters. These updated parameters are used to generate subsequent pulses to manipulate the qubit states. This allows dynamic calibration during algorithm execution to compensate for drifting gate fidelity due to environmental noise.

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Converting signals between frequency regimes like optical and microwave to enable efficient quantum computing with reduced losses and compactness compared to using microwave signals throughout. The conversion is done by a separate system that takes microwave control signals from the main control system and converts them to the desired frequency regime for sending to the quantum processing unit. This allows using lower loss, more compact optical or terahertz signals in the quantum hardware instead of microwave signals. The conversion system receives the microwave control signals, converts them, and sends the converted signals to the qubits.

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Scalable quantum computing with improved thermal management to enable controlling a large number of qubits at cryogenic temperatures. The approach involves using separate cooling systems for the qubits and control electronics to maintain a temperature gradient between them. This allows close integration of the qubits and control circuits without excessive heat dissipation. A thermal barrier isolates the qubits from the control electronics. The qubits are cooled to lower temperatures than the control circuits. Two independent dilution refrigerators provide optimized cooling for each device type. This allows scaling quantum devices with fewer wires and lower heat dissipation compared to conventional systems with a single refrigerator.

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High-density embedded broadside-coupled attenuators for reducing noise in control signals transmitted to superconducting qubits. The attenuators comprise a reflectively-terminated input line broadside-coupled to an output line, eliminating the need for a looped-back output line configuration that consumes excessive space. The reflectively-terminated input line causes control signals to reverse direction upon encountering a termination point, enabling near-end crosstalk to generate an attenuated signal in the output line without requiring a loop-back configuration.

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Reducing parasitic interactions between qubits in a quantum computing system by operating qubits at distinct frequency patterns, particularly during idling, measurement, and quantum logic gate operations. The system employs a qubit frequency control architecture that enables scalable and practical implementation of quantum computations, including surface code cycles, with reduced parasitic couplings between diagonally opposed qubits.

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A system for mitigating dispersion-induced distortion of baseband pulses in quantum computing applications, comprising a qubit device, a signal generator producing a radiofrequency signal, and an envelope detector converting the radiofrequency signal into a baseband signal. The envelope detector is coupled to the signal generator via a non-superconducting cable and to the qubit device via a superconducting cable, enabling radiofrequency-to-baseband conversion to reduce dispersion-induced distortion.

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Determining the temperature of superconducting quantum computing devices using on-chip resonators to enable autonomous temperature monitoring without affecting device performance. The technique involves measuring the frequency shift of superconducting resonators due to temperature-induced changes in kinetic inductance. By comparing the resonator's estimated frequency at a reference temperature to its operating frequency, the temperature can be determined without direct contact or thermal sensors. This allows accurate temperature monitoring for superconducting qubits, which is critical for maximizing qubit lifetime by operating at low temperatures.

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We study the problem of dynamic cooling whereby a target qubit is cooled at the expense of heating up $N-1$ further identical qubits, by means of a global unitary operation. A standard back-of-the-envelope high temperature estimate establishes that the target qubit temperature can only be dynamically cooled by at most a factor of $1/\sqrt{N}$. Here, we provide the exact expression for the smallest temperature to which the target qubit can be cooled and reveal that there is a crossover from the high initial temperature regime where the scaling is in fact $1/\sqrt{N}$ to a low initial temperature regime where a much faster scaling of $1/N$ occurs. This slow $1/\sqrt{N}$ scaling, relevant for early high-temperature NMR quantum computers, is the reason dynamic cooling was dismissed as ineffectual around 20 years ago; the fact that current low-temperature quantum computers fall in the fast $1/N$ scaling regime, reinstates the appeal of dynamic cooling today. We further show that the associated work cost of cooling is exponentially more advantageous in the low temperature regime. Finally, ... Read More

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Determining average occupation of quantum states of qubits with more than two levels using shuffling sequences and partial readouts. The method involves applying quantum gates, shuffling sequences, and partial readouts on multi-level qubits to determine the average populations of the qubit states. Shuffling sequences exchange populations between states that the readout can't distinguish. By measuring after shuffling and repeating with different sequences, the average occupations can be inferred. This allows estimating leakage from computational to non-computational states without direct measurement.

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A phase-mode bit-addressable sensing register for superconducting circuits that enables bias level monitoring without disrupting operation. The register uses a phase-mode logic shift register with integrated bias sensing circuits that can be selectively enabled and disabled within the operating range of the superconducting logic circuits. The sensing circuits can be configured to measure bias levels at specific points in the circuit, allowing for precise optimization of bias parameters such as amplitude, phase, and DC value.

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This paper analyzes the performance requirements that need to be met by a clock generator applied to a low-temperature quantum computer and analyzes the negative effects on the clock generator circuit under low-temperature conditions. In order to meet the performance requirements proposed in this paper and suppress the negative effects brought about by the low temperature, a clock generator for ultra-low-temperature quantum computing is designed. This clock generator is designed by using F-CLASS Voltage Controlled Oscillator (VCO), power filter, tail resistor, differential charge pump, and other techniques. And the noise characteristics of the clock generator are analyzed by Impulse Sensitive Function (ISF) and simulation results. After simulation tests, the average power consumption of the clock generator designed in this paper is 7 mW, the phase noise is 121 dBc/Hz@1 MHz, and the jitter is 62 fs. The performance of the clock generator meets the performance requirements proposed in this paper, and the reduction in the corner frequency proves that the circuit will have better perfor... Read More

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Method for generating phase-accurate signals using a signal generator with multiple channels, where each channel has a digital section, an up-converter, and an envelope generator. The digital section generates a digitally encoded phase shift. The up-converter mixes the encoded phase signal with a local oscillator to create an upconverted signal with the encoded phase. The envelope generator provides the pulse shape. The channels allow generating multiple signals with independent phase shifts. This enables accurate phase alignment of signals across channels for applications like quantum computing.

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Dynamic control of ZZ interactions in quantum computing devices using continuous wave (CW) tones applied via drive lines to biasing components operatively coupled to qubits. The biasing component dynamically adjusts the relative phase difference or amplitude of the CW tones to control ZZ interactions between coupled qubits, enabling flexible management of idle gate error and multi-qubit circuit infidelity.

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Fast control of superconducting qubits like fluxonium to enable high fidelity quantum computing with shorter gate times. The methods include initializing the qubit using a reset protocol that excites it to a higher energy state and then decays to the metastable state. This allows initializing at lower temperatures than possible with traditional gate sequences. The fast gate operations are done using single-cycle flux pulses that rotate the qubit state within the Larmor period. This avoids slow charge-based transitions. The readout uses a quantum non-demolition measurement on the qubit in the appropriate basis.

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A bidirectional transmission system for multiple signals between a first transceiver device and a second transceiver device, utilizing a plastic waveguide to guide signals with frequencies between 1 GHz and 10 THz. The system enables simultaneous transmission of multiple signals, including Qubit manipulation and read signals, control signals, and wake-up signals, with zero energy consumption on the Qubit side. The system comprises a multisignal power radio transmitter and receiver, a passive transceiver on the cryogenic interface, and a plastic waveguide linking the transceivers.

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Scalable qubit architecture for quantum computing that allows more qubits and lower error rates while reducing power consumption compared to conventional systems. The architecture uses a modulated multi-frequency control scheme to write and read qubits. Instead of using a single frequency to drive each qubit, multiple frequencies are combined and mixed to create sidebands around the qubit frequency. This allows multiple qubits with different frequencies to be controlled using a smaller number of components. The sideband frequencies are mixed with the qubit frequency to create signals that drive the qubits. This reduces the overall frequency content and power requirements compared to direct frequency conversion. The architecture uses combiners, mixers, and filters to combine and manipulate the signals for each qubit. This allows scalability by using a common base frequency for the sidebands and varying the qubit frequencies between qubits.

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This work studies self-heating effects in InGaAs cryogenic HEMT devices, which aim at the enhancement of control/readout electronics performance in quantum computers. Starting from the well-known method of gate resistance thermometry, documented in literature for its reliable results, we characterized these devices down to deep cryogenic temperatures, namely 10 K, typical of signal-processing electronics for qubits, such as low-noise amplifiers (LNA). We furthermore compared the results with those belonging to far more industrialized silicon technologies (Si FDSOI and bulk), showing exceptional performance of the InGaAs HEMTs thanks to their lack of buried oxide and quantum well structure, which combined with their high electron-mobility, makes them a great study case for the technologies of the future.

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The recent developments in quantum computing architectures have caused an increasing interest in cryogenic low-noise amplifiers (LNAs) due to their role in the qubit readout chain. Advanced quantum computers with many qubits will require cryogenic integration of thousands of LNAs. Minimizing LNA power dissipation while maintaining low noise will be of key importance due to the limited available cooling power in cryostats. In addition, self-heating (SH) and heat dissipation of cryogenic LNAs represent limiting factors in the devices performance and integration. While SH is predicted to increase in transistor channels at cryogenic temperatures, large-scale thermal spreading outside of active devices due to SH is not well understood. Here, the 2-D heat flow due to the SH of InGaAs/InP high electron mobility transistors (HEMTs) is experimentally studied. We realize a matrix of Schottky diode thermal sensors close to the active device, which allows us to obtain a full 2-D temperature mapping with respect to the power dissipated by the HEMT. Measurements are performed in the temperature r... Read More

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A radio frequency (RF) transmission circuit for quantum computing systems, particularly when operated in a cryogenic environment. The circuit includes an input stage, a current-mode mixer, a current-mode attenuator, and a matching network, all configured in a series stack to reduce power consumption. The circuit enables low-distortion frequency translation and arbitrary waveform generation for controlling qubits in a cryogenic environment.

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Superconducting integrated circuits for quantum computing that reduce power dissipation and improve qubit coherence at ultralow temperatures. The circuits have reduced-loss insulating layers, Josephson junctions with lower critical current, a kinetic inductance layer, and a non-superconducting resistive layer at mK temperatures. These modifications enable scaling superconducting circuits for quantum computing while maintaining compatibility with classical superconducting design rules. The circuits also use deuterium instead of hydrogen to further reduce noise in quantum devices.

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A device, method, and system for adjusting the resonance frequencies of quantum bits in quantum processors using magnetic fields in superconductors. The device includes a superconducting layer configured to generate a magnetic field, which interacts with a qubit to change its resonance frequency. The method involves fabricating the superconducting layer and qubit on a chip, and then applying a magnetic field to the layer to tune the qubit's frequency. The system enables individual qubit tuning without penetrating the device package, addressing frequency crowding issues in quantum processors.

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Superconducting quantum chip design for reducing crosstalk between qubits and enabling scalable quantum computing. The chip has a feature where the coupler between qubits has adjustable frequency response. By tuning the coupler response, the qubits can be decoupled when needed to minimize crosstalk. This allows flexible qubit layout without restrictive fixed couplings. The controller adjusts the coupler response to have an odd number of phase reversal points between the qubit frequencies. At these points, the cross-resonance effect between qubits is zero.

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Scaling up a quantum processor to tackle real-world problems requires qubit numbers in the millions. Scalable semiconductor-based architectures have been proposed, many of them relying on integrated control instead of room-temperature electronics. However, it has not yet been shown that this can be achieved. For developing a high-density, low-cost wiring solution, it is highly advantageous for the electronics to be placed at the same temperature as the qubit chip. Therefore, tight integration of the qubit chip with ultra low power complemen-tary metal-oxide-semiconductor (CMOS) electronics presents a promising route. We demonstrate DC biasing qubit electrodes using a custom-designed 65nm CMOS capacitive digital-to-analog converter (DAC) operating on the mixing chamber of a dilution refrigerator below 45 mK. Our chip features a complete proof of principle solution including interface, DAC memory and logic, the capacitive DAC, and sample-and-hold structures to provide voltages for multiple qubit gates. The bias- DAC is combined with the qubit using a silicon interposer chip, enabling f... Read More

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Quantum computing is the most prominent field in cryogenic applications. And they use room temperature classical electronic controllers for qubit read-out and control, which are bulky and complex, and limit the number of effective qubits to operate. There is a need for a higher level of integration and a large number of qubit operations, so the validation of CMOS technology at cryogenic temperature is required. This paper presents the study of device characteristics and design parameter variation of 180nm NMOS device. Also, the low noise transconductance amplifier is designed and simulated for noise performance at room temperature 300K and at cryogenic temperature 4K. The proposed design shows the noise figure of 5.3 dB and 0.272 dB at 300K and 4K, respectively. Also, it achieves the S21 of 14.4 dB and 17.4 dB at 300K and 4K, respectively with IIP3 of 19.64 dBm at 4K. This opens the scope for designing a CMOS qubit controller at cryogenic temperature in addition to the high level of integration.

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Scalable solid-state quantum computing system that enables controlling and reading out large numbers of qubits in a scalable way while minimizing heat leak and simplifying connection to the cryogenic environment. The system uses optical fibers instead of coaxial cables to connect the quantum control system and cryogenic quantum processor. This reduces heat leak and allows multiplexing to address many qubits with a single fiber. The processor converts optical signals to microwave frequencies to control the qubits, then back to optical for readout. Integrated photonics on the chip allows optical connections between the processor and fibers. This scalable fiber-based interface enables practical large-scale quantum computers.

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Stacked quantum computing architecture that improves coherence and density of qubits by separating the lossy dielectrics and control wiring from the qubits. The design involves bonding a chip with high coherence qubits made of low loss superconductors to another chip with qubit readout elements, control wiring, and lossy dielectrics. This allows relaxed layout constraints on the qubit chip and higher coherence qubits. The second chip's shielding prevents crosstalk between qubits and wiring. The readout elements on the second chip can still have moderate coherence despite no dielectric.

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A reciprocal quantum logic (RQL) inverter that integrates a superconducting quantum interference device (SQUID)-based structure with a pulse generating Josephson junction (JJ) to achieve high-speed digital logic operation with low power consumption. The inverter includes a SQUID-based structure that receives an inverter bias signal and a data input, and a pulse generating JJ that is triggered by the SQUID-based structure to produce a single flux quanta (SFQ) output signal. The SQUID-based structure includes a first SQUID JJ that is triggered by the data input to prevent the pulse generating JJ from being triggered, thereby enabling correct inversion operation.

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Architecture and information processing method for superconducting quantum computers that reduces heat leakage and wiring requirements compared to conventional designs. The key idea is to separate the low-temperature quantum processor from the high-temperature control electronics. The quantum processor is kept in a cryogenic environment, while the control electronics are at room temperature. They communicate over a low-temperature to room-temperature link. This avoids routing a large number of signals through the cryogenic equipment, which would leak heat and require impractical low-temperature wiring. The cryogenic equipment can then provide the necessary signals to operate the quantum processor.

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Parametric amplification in a quantum computing system using traveling wave parametric amplifiers (TWPAs) with embedded Josephson junctions to amplify weak quantum signals like qubit readouts. The TWPAs have Josephson junctions in a nonlinear medium that amplify weak signals when mixed with strong pump signals. This allows amplification without additional power consumption or backaction compared to active amplifiers. The TWPAs are integrated into the quantum computing system to amplify readout signals and feedback control signals between qubits and readout electronics.

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A superconducting circuit for combining and separating direct currents and microwave signals, comprising a direct current circuit, a microwave circuit, and a common circuit. The direct current circuit includes a bandstop circuit, the microwave circuit includes a capacitor, and the common circuit supports both the direct current and microwave signals. The circuit enables on-chip realization of superconducting devices for combining and separating DC and microwave signals without the need for large inductances.

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A qubit control system for a quantum computer that uses optical multiplexing to reduce the number of control lines required to control multiple qubits. The system modulates qubit control signals onto different wavelengths of light, multiplexes them onto a single optical waveguide, and then demultiplexes and demodulates the signals to deliver them to individual qubits through spatially separated waveguides. This approach enables efficient control of large numbers of qubits while minimizing the introduction of heat and noise into the superconducting environment.

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Superconducting vias for routing electrical signals through a substrate used in quantum integrated circuits. The vias have a closed structure with a superconducting membrane occluding an orifice in the substrate. This provides physical continuity and compatibility with downstream processes compared to open via structures. A superconducting layer extends from the membrane to another orifice, allowing superconducting electrical pathways through the substrate. The closed via configuration reduces distortion of critical dimensions for quantum circuit elements and improves compatibility with cryogenic temperatures.

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The interconnects between a quantum processor and control electronics can be made more compact and reliable by placing classical circuits at cryogenic temperature (CT), closer to that of qubits. Low ambient temperature is also favorable to lower the noise of electronics, which is critical for quantum computing applications. Qubit control requires microwave signals modulated by baseband arbitrary waveform envelopes, so as to generate 10ns-to-100ns periodic pulsed signals to manipulate the qubit state [1].In order to prevent qubit state dephasing, the carrier should have a precision better than 1.9kHz (rms). The signal noise bandwidth should be limited from above by the qubit operation speed and from below by the echo-period [1]. To ensure scalability, signal sources should be tunable in a wide range, e.g., 3-to-9GHz for superconducting qubits, assuming enough margin to adapt to PVT variations. To address these constraints, a cryo-CMOS class F <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2, 3</inf> LC-tank voltage-controlled oscillator ... Read More

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An integrated attenuator for qubit drive signals that combines a directional coupler with an absorptive low-pass filter. The directional coupler couples a portion of the input signal to a second transmission line, while the absorptive low-pass filter attenuates frequencies outside its passband. The filter is implemented using a stripline transmission line embedded in a microwave absorber material, allowing for compact integration within a cryostat. The attenuator enables selective attenuation of high-frequency qubit control signals while preserving low-frequency signals, addressing the challenges of scaling up quantum computing architectures.

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A quantum device that enables cross-resonance operations in a dispersive regime, where the detuning between qubits is significantly larger than their anharmonicities. This approach mitigates frequency collisions and crosstalk between qubits, enabling scalable quantum computing architectures with improved gate fidelity.

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A traveling wave superconducting parametric amplifier with a low characteristic impedance of around 50 Ohms, achieved through a novel microstrip transmission line structure. The amplifier comprises a chain of Josephson junctions or SQUIDs connected in series, covered by a thin dielectric layer and a ground plane, which forms a high-capacitance transmission line. This structure eliminates the need for large lumped capacitors, enabling compact and high-performance parametric amplification.

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Method for detecting leakage of a quantum data qubit without directly measuring it or projecting it into a specific state. The method involves applying cross-resonance and echo pulses to the data qubit and ancilla qubit. The cross-resonance pulses couple the qubits. The echo pulses rotate the data qubit. If the data qubit leaks, it cancels out the cross-resonance effect. By measuring the ancilla qubit, leakage can be detected without disturbing the data qubit.

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