Driver Circuits for Micro-LED Displays

Display device with optimized voltage distribution for subpixels containing differently colored LEDs. The subpixels each have multiple groups of LEDs connected in series. The number of series connections is different in the blue/green subpixel versus the red subpixel. This reduces voltage loss in the red subpixel compared to equal series connections in all subpixels. It allows similar operating voltages for all subpixels, simplifying circuitry.

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Display panel design to improve display uniformity by reducing via hole defects around the perimeter of the display region. The panel has a base substrate with a main display area. Inside the display area are pixel groups with light-emitting units. The signal lines to the pixel groups have a mix of metal and transparent lines. Metal lines are used for signals that have a greater impact on display brightness. This reduces the resistance difference between the signal lines inside and outside the display area. This reduces via hole defects around the display perimeter, improving display uniformity.

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Compensation circuit for display devices to improve stability and reduce abnormal images when switching between voltage compensation methods. The circuit has a delay component that allows gradual transition between methods instead of instant switching. When display compensation uses common voltage, the delay outputs common voltage to the display and operating voltage to the amplifier. When using polarity inversion, the delay outputs operating voltage to the amplifier and common voltage to the display. This prevents common voltage loss during switching.

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Reducing color deviation in a display device when driven at variable frequencies to prevent tearing. The technique involves changing the voltage levels of the data signals in the overlap period when a dummy scan operation and a second active scan operation are happening simultaneously. This reduces color differences between upper and lower areas of the display due to variable frame rates.

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Pixel circuit for display panels to improve low brightness and grayscale performance and reduce unevenness. The circuit has a driving module to drive the display element and a shunt branch connected between the element electrode and a reference voltage line. This allows part of the driving current to be shunted to the reference line. This increases the effective brightness of the element through current amplification. This helps compensate for characteristic fluctuations in low brightness/grayscale that affect display quality. By selectively turning on the shunt branch at low brightness, it improves low brightness/grayscale uniformity.

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Integrating micro LEDs with digital and analog circuitry in a stacked configuration to enable compact, power-efficient display systems. The technique involves reconstituting a semiconductor wafer with a layer containing the micro LEDs after forming the driver circuitry on a separate wafer. This allows integrating the micro LED arrays with the digital and analog circuits in a common wafer. The process involves singulating and bonding micro LED wafers to a driver wafer, then removing the substrate and forming vertical connections through the stack. It eliminates the need for wafer size mismatch and waste compared to bonding larger wafers.

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Reducing power consumption in display devices by selectively supplying clock signals to scan circuits in each horizontal line. A clock controller generates control signals in response to scan signals. A clock selector supplies clock signals to the scan circuits in each horizontal line only when the control signals are asserted. This avoids unnecessary clocking during blank periods.

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Driving circuit for displays with improved stability and reliability. The circuit has a pull-up node control circuit, a pull-down node control circuit, and an output circuit. The output circuit drives the display pixels. The channel length of some transistors in the output circuit, pull-up node control, and reset terminal control circuits is increased compared to other transistors in the circuit. This improves stability of those transistors when driving large currents. The increased channel length is compensated by wider active areas. The increased channel length and wider active areas improve stability and reliability of the circuit, especially for large current driving.

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Reducing latency in display processing when updating multiple regions of interest (ROIs) of a frame to prevent tearing artifacts. The technique involves using both software and hardware triggers for ROI updates instead of relying solely on software triggers. When a software trigger indicates to start an ROI update, hardware triggers are generated based on completion of the ROI. This allows faster chaining of ROI updates compared to waiting for software triggers. Hardware triggers can be faster due to direct memory access and internal pipelining.

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Display substrate with improved stability of the drive transistor in high resolution, high frequency displays. The substrate has a shield electrode in the second conductive layer, parallel to the base substrate, that shields the first connection electrode from voltage jumps on the scan signal line. This prevents voltage spikes from the scan line affecting the gate of the drive transistor, improving stability and display quality. The shield electrode is connected to the power supply line. The shield overlaps the scan line and connection electrode projections on the substrate.

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A display device and method to mitigate luminance variations when using different refresh rates. The display has scan lines and initialization lines. During frames, scan signals are sent to the scan lines and initialization signals to the initialization lines. If initialization signals overlap during active and blank periods, scan signals with different widths are sent to scan lines based on the area of the display. This prevents luminance differences when displaying images at varied refresh rates.

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Chip on film technology with high pin count capability for high resolution displays. The chip on film has a unique layout to enable very high pin counts while maintaining yield and processability. The chip design has separate first and second leadframes, with the first leadframes between the pad layer and substrate. This allows denser pad arrays and smaller lead pitch. The second leadframes have raised structures on the substrate that align with the second leadframe connections. This allows high pin count without expanding the chip size. The layout enables very high pin counts while maintaining yield and processability compared to conventional chip on films.

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Driver module for display devices to reduce signal delay and voltage differences at far gate line terminals in GOA bilateral cross drive configurations. The driver module has separate control and driver circuits for each level of gate lines. Each level driver circuit provides the clock signal to its gate line. The control circuits simultaneously drop the far terminal voltage when the near terminal voltage drops, synchronizing the signal delays. This prevents overcharging, voltage differences, and display issues. The separate control circuits also help reduce leakage compared to single-sided GOA.

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Reducing the load on data lines in a display apparatus to improve performance and reduce non-display area by incorporating capacitors in the design. The capacitors are formed by connecting branch lines to main data lines and also using separate bridge lines. This allows forming capacitors between the branch lines and main lines as well as between bridge lines. This reduces the load on the data lines when transmitting signals to the pixel circuits, improving performance. By using these internal capacitors, the need for external capacitors is reduced, which can save space and prevent expansion of the non-display area around the display.

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Pixel circuit design for displays that enables reliable threshold voltage compensation for improved display quality at high frame rates. The circuit separates data writing and voltage compensation stages. A reset circuit controls connections to initialize voltages. An adjustment circuit modulates node voltages. A light emission control circuit sets gate voltage. The drive circuit transmits signals. This allows flexible compensation signals for reliable threshold adjustment without timing constraints.

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Display device with fine pixel size by sharing common circuits among pixels. The display has a panel with pixels, each containing a light emitting element and driving transistor. A separate common circuit area connects to the driving transistor and light emitting element in each pixel. This allows sharing components like power switches and capacitors between pixels on a horizontal line. This reduces pixel size by eliminating duplicated circuits in each pixel. The common circuits are controlled by separate signals to initialize, write data, and emit light.

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Display device with efficient arrangement of connection terminals and wiring to improve yield and manufacturing of high-resolution displays. The display has a staggered layout of output terminals around the display edge. The terminals have stacked conductive layers. The lower layer of each terminal extends towards the display area as a wiring. This allows more terminals to fit in the limited space around the chip without reducing terminal width. It also reduces wiring density on the display side.

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Display panel driver that reduces power consumption by analyzing input image data and skipping processing for certain frames. The driver has a data analyzer that checks if line data represents a single grayscale value, identical values, or is similar to previous lines. If so, it skips compensation or sends fixed data instead of processing all pixels. This avoids unnecessary work when the frames are static or identical. The analyzer flags indicate when to bypass processing, allowing the driver to compensate only some pixels or lines instead of all.

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Display driving device that allows blank frames to be displayed without requiring a separate amplifier, and a display device using it. The display driving device includes a gamma voltage generator, amplifier areas, a switch, and a timing controller. The gamma voltage generator outputs gamma voltages to the amplifier areas during one time period, and connects directly to the source lines during another time period. The switch switches between the gamma voltage generator and amplifier areas. The timing controller alternates between open and closed switch states. During the open state, the amplifiers amplify the gamma voltages. During the closed state, the gamma voltages are directly connected to the source lines for blank frames. This allows blank frames to be displayed without the amplifiers, saving power.

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Display device with improved reliability and repairability by preventing or substantially preventing dark spot defects in subpixels. The display has separate first and second conductive patterns that are electrically disconnected from each other. The subpixel electrodes are also disconnected from each other. This allows replacing a reversed connected defective LED without removing it. A laser is used to cut the connections between the electrodes and underlying conductive patterns, then connect them in the correct forward direction. This allows reusing the defective LED by changing its driving current direction. Having multiple sub-electrodes per end of the LED provides redundant current paths to improve reliability.

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